ATMEL 89C55 PDF
NXP Flash MCU to Atmel Flash MCU Cross Reference. 07/01/ 86KB. NXP Flash MCU to Atmel Flash MCU Devices, Non-Direct Replacements. 07/01/ The device is manufactured using Atmel’s high density nonvolatile memory technology and is compatible with the industry standard 80C51 instruction set and. 89C55 datasheet, 89C55 circuit, 89C55 data sheet: ATMEL – 8-Bit Microcontroller with 20K Bytes Flash,alldatasheet, datasheet, Datasheet search site for.
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Port 3 also receives the highest-order address bit and some control signals for Flash programming and verifica- tion.
Read accesses to these addresses will in general return random data, and write accesses will have an indetermi- nate effect. Port 2 also receives the high-order address bits and some control signals during Flash programming and verification.
For example, the following indirect addressing instruction, where R0 contains 0A0H, accesses the data byte at address 0A0H, rather than P2 whose address is 0A0H. Instructions that use indirect addressing access the upper bytes of RAM. The device is manu- factured using Atmel’s high density nonvolatile memory technology and is compatible with the industry standard 80C51 instruction set and pinout. As inputs, Port 3 pins that are externally being pulled low will source current I.
WR external data memory write strobe. T0 timer 0 external input. INT1 external interrupt 1. Port 1 also receives the low-order address bytes during Flash programming and verification.
Search field Part name Part description. Note that stack operations are examples of indirect addressing, so the upper bytes of data RAM are avail- able as stack space. Otherwise, the pin is weakly pulled high. The AT89C55 provides the following standard features: Setting the ALE-disable bit has no effect if the microcontroller is in external execution mode. Port 0 also receives the code bytes during Flash program- ming and outputs the code bytes during program verifica- tion.
89C55 Datasheet(PDF) – ATMEL Corporation
In addition, the AT89C55 is designed with static logic for operation down to zero frequency and sup- ports two software selectable power saving modes.
XTAL2 Output from the inverting oscillator amplifier.
Port 3 also serves the functions of various special features of the AT89C55, as shown in the following table. XTAL1 Input to the inverting oscillator amplifier and input to the internal clock operating circuit.
Note, however, that one ALE pulse is skipped during each access to external data mem- ory. TXD aymel output port. INT0 external interrupt 0.
At89c55-24jc Atmel IC Microcontroller 8-bit 44 Pin PLCC MCU 89c55-24jc
Note, however, that if lock bit 1 is programmed, EA will be internally latched on reset. When 1s are written to Port 1 pins, they are pulled high by the internal pullups and can be used as inputs. RD external data memory read strobe. By combining a versatile 8-bit CPU with Flash on a monolithic chip, the Atmel AT89C55 is a powerful microcomputer which provides a highly flexible and cost effective solution to many embedded control applications.
In this mode, P0 has internal pul- lups. In this application, Port 2 uses strong internal pul- lups when emitting 1s. T1 timer 1 external input. Instructions that use direct addressing access SFR space. As inputs, Port 2 pins atel are externally being pulled low will source current I.
Interrupt Registers The individual interrupt enable bits are in the IE register. Amtel on-chip Flash allows the program memory to be reprogrammed in-system or by a conventional nonvolatile memory programmer. In that case, the reset or inactive values of the new bits will always be 0.
User software should 889c55 write 1s to these unlisted loca- tions, since they may be used in future products to invoke new features. The Power Down Mode saves the RAM con- tents but freezes the oscillator, disabling all other chip func- tions until the next hardware reset. Note that not all of the addresses are occupied, and unoc- cupied addresses may not be implemented on the chip.
When 1s are written to port 0 pins, the pins can be used as high- impedance inputs. Three-Level Program Memory Lock.